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Telkomnika (Telecommunication Computing Electronics and Control), Volume 13, Issue 3, 2015, pp. 1089-1096

A fast fractal image compression algorithm combined with graphic processor unit

Guo H. 1, He J. * 1
Abstract :

Directed against the characteristics of computational intensity of fractal image compression encoding, a serial-parallel transfer mechanism is built for encoding procedures. By utilizing the properties of single instruction and multithreading execution of compute unified device architecture (CUDA), the parallel computational model of fractal encoding is built on the graphic processor unit (GPU) in order to parallelize the considerably time-consuming serial execution process of searching for the block of best match. The experimental result indicates, the algorithm in this paper shortens the encoding time to the millisecond scale and significantly boosts the execution efficiency of fractal image encoding algorithm while keeping the decoded image in good quality.

Keywords : Compute unified device architecture,Fractal image compression,Graphic processor unit,parallel computing
Subject Area : Electrical and Electronic Engineering

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